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Chalcogenide Semiconductor Lab

Research

Overview

I Research Interests

 

  • Next-Generation Memory Devices
    • 2T-0C devices based on oxide semiconductor channel materials


  • Cell Selector for 3D Emerging Memories
    • ALD OTS Materials Deposition and Characterization
    • Low-cost and high-speed OTS only memory (SOM) Applications


  • Development of SiC-based CMOS Process and Multi-Sensor SoC Platform

I Current Research Projects

  • Development of 4D Stackable 2T-0C DRAM device based on ultra thin channel FET (23.5~27.12, Korea Evaluation Institute of Industrial Technology, KEIT)

2T-0C DRAM device development (23.5~27.12)

2T-0C device fabrication and its characterization


  • Development of original technology for variable threshold high density memory and crossbar array (24.3~26.12, Minitry of science and ICT, MSIT)

Metal chalcogenide ALD OTS for SOM (24.3~26.12)

Binary or Ternary metal chalcogenide ALD process


  • Development of 8-inch SiC Wafer-based Multi-Sensor SoC Platform (23.4~27.12, National Research Foundation of Korea, 한국연구재단)

Wide Bandgap Semiconductor Devices (23.4~27.12)

SiC CMOS Platform with co-integrated UV sensor



Address

Dep. of Semiconductor Engineering, POSTECH 77,

Cheongam-ro, Nam-Gu, Pohang, Gyeongbuk-Do, Korea

(37673)


TEL: +82-54-279-7085

E-mail: daehwankang@postech.ac.kr


Copyright ⓒ 2023. Chalcogenide Semiconductor Lab (CSL)

All rights reserved | Designed by greypixel

Address

Dep. of Semiconductor Engineering, POSTECH 77, Cheongam-ro, Nam-Gu, Pohang, Gyeongbuk-Do, Korea (37673)


TEL: +82-54-279-7085

E-mail: daehwankang@postech.ac.kr

Copyright ⓒ 2023. Chalcogenide Semiconductor Lab (CSL) All rights reserved | Designed by greypixel